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Effect of low and high temperature anneal on process-induced damage of gate oxide

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2 Author(s)
King, J.C. ; Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA ; Chenming Hu

We have investigated the ability of high and low temperature anneals to repair the gate oxide damage due to simulated electrical stress caused by wafer charging resulting from plasma etching, etc. Even 800/spl deg/C anneal cannot restore the stability in interface trap generation. Even 900/spl deg/C anneal cannot repair the deteriorated charge-to-breakdown and oxide charge trapping. As a small consolation, the ineffectiveness of anneal in repairing the process-induced damage allows us to monitor the damages even at the end of the fabrication process.<>

Published in:

Electron Device Letters, IEEE  (Volume:15 ,  Issue: 11 )