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A parallel algorithm for time-slot assignment problems in TDM hierarchical switching systems

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2 Author(s)
Funabikiy, N. ; Div. of Syst. Eng., Sumitomo Metal Ind. Ltd., Amagasaki, Japan ; Takefuji, Y.

The paper presents a parallel algorithm for time-slot assignment problems in TDM hierarchical switching systems, based on the neural network model. The TDM systems are operated in repetitive frames composed of several time-slots. A time-slot represents a switching configuration where one packet is transmitted through an I/O line. The goal of the algorithm is to find conflict-free time-slot assignments for given switching demands. The algorithm runs on a maximum of n2×m processors for m-time-slot problems in n×n TDM systems. In small problems up to a 24×24 TDM system, the algorithm can find the optimum solution in a nearly constant time, when it is performed on n2×m processors

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Communications, IEEE Transactions on  (Volume:42 ,  Issue: 10 )