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A 3.84 GIPS integrated memory array processor with 64 processing elements and a 2-Mb SRAM

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8 Author(s)
Yamashita, N. ; Inf. Technol. Res. Lab., NEC Corp., Kanagawa, Japan ; Kimura, T. ; Fujita, Y. ; Aimoto, Y.
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An integrated memory array processor (IMAP) ULSI with 64 processing elements and a 2-Mb SRAM has been developed for image processing. The chip attains a 3.84 GIPS peak performance through the use of SIMD parallel processing and a 1.28 GByte/s on-chip processor-memory bandwidth. The IMAP is capable of parallel indirect addressing, which increases applications for parallel algorithms. Large power consumption with the wide memory bandwidth is avoided by reducing the number of active sense amplifiers and adopting dynamic power control. Fabricated with a 0.55-μm BiCMOS double layer metal process technology, the IMAP contains 11 million transistors in a 15.1×15.6 mm2 die area

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:29 ,  Issue: 11 )

Date of Publication:

Nov 1994

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