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Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC

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The following topics were dealt with: processor architecture; system level transformation and micro code generators; sequential circuit testing; system design and mixed A/D synthesis;circuit optimization and partitioning; BIST techniques; finite state machine verification; fault modeling; synchronous finite state machines; BDD concepts; boundary scan applications;DSP implementations; algorithmic transformations in high-level synthesis; DFT for delay faults and sequential machines; estimation during high-level synthesis; statistical and high-level timing analysis; bridging faults in testing; specification and synthesis of system interfaces; routing; testing efficiency; system-level design methodologies; scheduling in high-level synthesis; analogue system design; logic, circuit, and yield simulation; DFT for datapaths, controllers, and arrays; high-level verification

Published in:

European Design and Test Conference, 1994. EDAC, The European Conference on Design Automation. ETC European Test Conference. EUROASIC, The European Event in ASIC Design, Proceedings.

Date of Conference:

Feb. 28 1994-March 3 1994