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Random testing of interconnects in a boundary scan environment

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1 Author(s)
Chauchin Su ; Dept. of Electr. Eng., Nat. Central Univ., Chung-Li, Taiwan

In this paper, we propose a methodology for the random testing of interconnects with tri-state nets. A simple yet effective LFSR based impulse random test vector generator is designed to generate desired random vectors which will not activate multiple tri-state drivers with different values. The detail statistical analysis is conducted to derive two simple guidelines for the determination of test hardware configuration and the test length. The results show that the test length is compatible with the deterministic test methods

Published in:

European Design and Test Conference, 1994. EDAC, The European Conference on Design Automation. ETC European Test Conference. EUROASIC, The European Event in ASIC Design, Proceedings.

Date of Conference:

28 Feb-3 Mar 1994