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Multilevel logic synthesis of very high complexity circuits

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5 Author(s)
Burgun, L. ; Lab. MASI/CAO-VLSI, Univ. Pierre et Marie Curie, Paris, France ; Dictus, N. ; Greiner, A. ; Pradho, E.
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This paper presents an approach based on ROBDD representation for multilevel logic synthesis. This approach makes it possible to handle very high complexity circuits that cannot be synthesized by the classical factorization algorithms. Two important algorithms are used. The former generates a multilevel expression from an ROBDD. The latter builds a minimal ROBDD from the two ROBDDs representing an incompletely specified Boolean function. This approach is implemented in the logic synthesis software LOGIC developed as part of the ALLIANCE CAD package

Published in:

European Design and Test Conference, 1994. EDAC, The European Conference on Design Automation. ETC European Test Conference. EUROASIC, The European Event in ASIC Design, Proceedings.

Date of Conference:

28 Feb-3 Mar 1994