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Failure diagnosis of structured VLSI

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2 Author(s)
Waicukauski, J.A. ; Mentor Graphics Corp., Beaverton, OR, USA ; Lindbloom, E.

The authors describe a method for diagnosing the failures observed in testing VLSI designs that use the scan-path structure. Diagnosis consists of simulating selected faults after testing using a fault simulator that allows the application of several patterns in parallel. The method is also suitable for signature-based random-pattern testing. The authors discuss diagnostic fault simulation, fault-list generation, relating faults to defects, diagnostic strategy, and random-pattern failures, and they report some experimental results to indicate the procedure's power.<>

Published in:

Design & Test of Computers, IEEE  (Volume:6 ,  Issue: 4 )

Date of Publication:

Aug. 1989

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