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Behavioral to structural translation in a bit-serial silicon compiler

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2 Author(s)
R. I. Hartley ; Gen. Electr. Res. & Dev. Center, Schenectady, NY, USA ; J. R. Jasica

After a brief discussion of previous work in the field of behavioral-to-structural translation, the bit-serial architecture which is the target of the bit-serial compiler is discussed. The bit-serial language (BSL) is then defined, and the details of the behavioral-to-structural translation are given

Published in:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  (Volume:7 ,  Issue: 8 )