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A 10 K-gate 950 MHz CML demonstrator circuit made with a 1-μm trench-isolated bipolar silicon technology

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6 Author(s)
Depey, M.P. ; SGS-Thomson Microelectron., Grenoble, France ; Dell'ova, F. ; Chateau, J.-M. ; Mallardeau, C.
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A quad 512-b static shift register consuming 1.8 mW/stage designed to demonstrate the capabilities of an advanced bipolar silicon technology is discussed. The process uses 1-μm lithography, trench isolation, polyemitter transistors, polysilicon resistors, and polycide layer for local interconnections. This VLSI circuit (over 35 K transistors, 86-mm2 chip) has been implemented on a sea-of-cells structure. An appropriate scheme has been used for the clock distribution. The experimental results show operation at a clock frequency up to 950 MHz

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:24 ,  Issue: 3 )