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On an improved design approach for C-testable orthogonal iterative arrays

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2 Author(s)
Huang, W.-K. ; Dept. of Electr. & Comput. Eng., Colorado Univ., Boulder, CO, USA ; Lombardi, Fabrizio

An improved version of the C-testability approach for orthogonal iterative arrays presented by H. Elhuni et al. (see ibid., vol.CAD-5, p.573-81, 1986) is described. C-testability is defined by those criteria which characterize the complexity of the testing process as independent of the dimensions of the array and of the erroneous states of the cells. The proposed approach is based on a cellular automata characterization under single faulty assumption. This characterization analyzes the state transition table of a basic cell and adds new states to it. These states are used to reproduce internally to the array the test input and propagate the faulty state to the output pins of a chip. This process is analyzed exhaustively. The characteristics of the additional states are presented. The conditions of C-testability are fully proved. Complexity of the testing process (number of test vectors) is discussed. It is proved that the proposed approach has a lower complexity than that of Elhuni et al

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Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:7 ,  Issue: 5 )