Referenced Items are not available for this document.
A set of techniques for the synthesis of pipelined data paths is described, and Sehwa, a program that performs such synthesis, is presented. The task includes the generation of data paths from a data-flow graph along with a clocking scheme that overlaps execution of multiple tasks. Some design examples are given. Sehwa can find the minimum-cost design, the highest performance design, and other designs between these two in the design space. Sehwa is written in Franz Lisp and executes within minutes, for problems of practical size, on a VAX 11/750
Published in:
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
(Volume:7
,
Issue:
3
)
Date of Publication: Mar 1988
- Page(s):
- 356 - 370
- ISSN :
- 0278-0070
- INSPEC Accession Number:
- 3149959
- Digital Object Identifier :
- 10.1109/43.3169
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 August 2002
- Issue Date :
- Mar 1988
- Sponsored by :
- IEEE Council on Electronic Design Automation
About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies
A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.
