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The Nano Processor: a low resource reconfigurable processor

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3 Author(s)
M. J. Wirthlin ; Dept. of Electr. & Comput. Eng., Brigham Young Univ., Provo, UT, USA ; B. L. Hutchings ; K. L. Gilson

Reconfigurable logic systems approach the performance of application-specific integrated circuits (ASICs) while retaining much of the generality of conventional computing systems through reconfiguration. Unfortunately, the development of these systems, unlike conventional software systems, is hardware-intensive, requiring significant hardware development time. One way to introduce a more flexible development approach is to implement a customizable stored-program processor. For a given application, the designer can develop customized hardware to increase performance and then control the sequencing and operation of this hardware with software. Development time can be significantly reduced because conventional software development tools, e.g. assemblers and compilers, can be used to quickly develop new applications on the customized processor. This paper presents the Nano Processor, a fully customizable reconfigurable processor, together with its integrated assembler, that has been successfully implemented on the Xilinx 3000 series field programmable gate array (FPGA)

Published in:

FPGAs for Custom Computing Machines, 1994. Proceedings. IEEE Workshop on

Date of Conference:

10-13 Apr 1994