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A process and device model for GaAs MESFET technology: GATES

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2 Author(s)
Anholt, R. ; Solid State Electron Lab., Stanford Univ., CA, USA ; Sigmon, T.W.

A combined process and device modeling program for GaAs MESFET digital and microwave integrated-circuit technology is described. GATES (for GaAs transistor engineering models) is designed to meet the needs of process, test, and manufacturing engineers who require answers to questions about how process parameters and tolerances affect device performance and uniformity, but who have limited access to large-computer modeling tools. The program makes extensive use of analytical models. The physical models used for ion implantation, dopant diffusion and other process factors and the methods used to calculate carrier profiles, threshold voltages, layer resistivities. MESFET parasitic resistances, and I-V characteristics are discussed. The I-V curves can be fitted to expressions suitable for use in circuit optimization codes such as SPICE. It is shown how to calibrate some of the physical quantities

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Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:8 ,  Issue: 4 )