By Topic

New GaAs-MMIC process technology using low-temperature deposited SrTiO3 thin film capacitors

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $31
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

6 Author(s)
Nishitsuji, M. ; Semicond. Res. Center, Matsushita Electr. Ind. Co. Ltd., Osaka ; Tamura, A. ; Yahata, K. ; Shibuya, M.
more authors

The authors have developed a new GaAs-MMIC process technology using low-temperature deposited SrTiO3 thin film capacitors which were combined with WSi-gate selfaligned FETs. The SrTiO3 films were successfully deposited at 200°C by the RF magnetron sputtering method without degrading the FET characteristics. By integrating these on-chip SrTiO3 bypass capacitors onto the GaAs IC, the parasitic inductance from the source to ground interconnection was successfully reduced and an enhanced gain characteristic was obtained for a self-biased amplifier circuit

Published in:

Electronics Letters  (Volume:30 ,  Issue: 13 )