Referenced Items are not available for this document.
Dynamic logic is an attractive circuit technique giving reduced area and increased speed for CMOS circuits. Static logic has a major advantage: its superior noise margins. To be able to choose between a static and a dynamic implementation of a design, we need to know the requirements for dynamic logic. Here we try to identify possible errors, estimate the limits and discuss some possible solutions when considering noise in dynamic circuits
Published in:
Solid-State Circuits, IEEE Journal of
(Volume:29
,
Issue:
6
)
Date of Publication: Jun 1994
- Page(s):
- 655 - 662
- ISSN :
- 0018-9200
- INSPEC Accession Number:
- 4722385
- Digital Object Identifier :
- 10.1109/4.293110
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 August 2002
- Issue Date :
- Jun 1994
- Sponsored by :
- IEEE Solid-State Circuits Society
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