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Noise in digital dynamic CMOS circuits

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2 Author(s)
Larsson, P. ; Dept. of Phys. & Meas. Technol., Linkoping Inst. of Technol., Sweden ; Svensson, C.

Dynamic logic is an attractive circuit technique giving reduced area and increased speed for CMOS circuits. Static logic has a major advantage: its superior noise margins. To be able to choose between a static and a dynamic implementation of a design, we need to know the requirements for dynamic logic. Here we try to identify possible errors, estimate the limits and discuss some possible solutions when considering noise in dynamic circuits

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:29 ,  Issue: 6 )