Suppression of the boron penetration induced Si/SiO/sub 2/ interface degradation by using a stacked-amorphous-silicon film as the gate structure for pMOSFET

The authors report that the boron penetration through the thin gate oxide into the Si substrate does not only cause a large threshold voltage shift but also induces a large degradation in the Si/SiO/sub 2/ interface. An atomically flat Si/SiO/sub 2/ interface can be easily obtained by using a stacked-amorphous-silicon (SAS) film as the gate structure for p/sup +/ poly-Si gate MOS devices even with the annealing temperature as high as 1000/spl deg/C.<
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