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Algorithm and implementation of a learning multiple-valued logic network

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4 Author(s)
Cao, Q.-x. ; Fac. of Eng., Miyazaki Univ., Japan ; Ishizuka, O. ; Zheng Tang ; Matsumoto, H.

A learning technique and implementation for multiple-valued logic (MVL) networks are described. The learning problem is formulated as a minimization of an error function that represents a measure of distortion between actual and desired output. A gradient-based least-square-error minimization algorithm is used to minimize the error function, which in contrast to the backpropagation algorithm, does not involve a sigmoid function and requires only a simple sgn function in the learning rule. The algorithm trains the networks using examples and appears to be available in practice for most multiple-valued problems of interest. Circuit implementations of the learning MVL networks using CMOS current-mode circuits are described

Published in:

Multiple-Valued Logic, 1993., Proceedings of The Twenty-Third International Symposium on

Date of Conference:

24-27 May 1993