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Analog-to-digital conversion using custom CMOS analog memory for the EOS time projection chamber

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8 Author(s)
K. L. Lee ; Lawrence Berkeley Lab.., California Univ., CA, USA ; A. A. Arthur ; R. W. Jones ; H. S. Matis
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A multiplexing scheme for custom CMOS analog memory integrated circuits having 16 channels ×256 cells and acting as analog-to-digital converters (ADCs) to handle the 15360 signal channels of the Equation-Of-State Time Projection Chamber (EOS TPC) is described. The primary requirements of this system are high density, low power, and large dynamic range. The analog memory device multiplexing scheme was designed to digitize the information stored in the memory cells. The digitization time of the ADCs and the settling times for the memory unit were carefully interleaved to optimize the performance and timing during the multiplexing operation. This kept the total number of ADCs, a costly and power-consuming component, to an acceptable minimum

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IEEE Transactions on Nuclear Science  (Volume:38 ,  Issue: 2 )