CMOS ternary dynamic differential logic
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A new ternary dynamic differential logic (TDDL) has been developed with some favourable properties: high noise margin, standard CMOS process technology restricted to enhancement p- and n-MOSFETs, and no static power consumption. The complete TDDL circuit for a radix 3 full adder is presented
Published in:
Electronics Letters
(Volume:30
,
Issue:
10
)
Date of Publication: 12 May 1994