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Integrating networks and memory hierarchies in a multicomputer node architecture

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2 Author(s)
L. Choi ; Center for Supercomput. Res. & Dev., Illinois Univ., Urbana, IL, USA ; A. A. Chien

We propose a new multicomputer node architecture, the DI-multicomputer, which can provide higher memory and communication performance than existing multicomputer architectures. By integrating a router onto each processor chip and eliminating the memory bus interface, each processor uses packet routing for both local memory access and internode communication. Multi-packet handling mechanisms are used to implement a high performance memory interface based on packet routing. The DI-multicomputer network interface directs different types of messages to an appropriate level of the memory hierarchy, providing efficient communication for both short and long messages. Trace-driven simulations show that the communication mechanisms of the DI-multicomputer can achieve up to four times speedup when compared to existing architectures

Published in:

Parallel Processing Symposium, 1994. Proceedings., Eighth International

Date of Conference:

26-29 Apr 1994