By Topic

Relocatable register sharing technique for multithreaded processor architectures

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
T. Killeen ; Dept. of Comput. Sci., Ohio Univ., Athens, OH, USA ; M. Celenk

Multitasking improves processor utilization by allowing computation for one task to be overlapped with long latency operations involving other tasks. This requires substantial overhead to manage processes and interprocess communication, and reduces processor utilization. The paper presents a register sharing technique that supports efficient instruction stream interleaving of interacting tasks. This flexibility permits greater utilization of resources, allowing for more resident processes, and provides efficient interprocess communications in multitasking environments. Theoretical analysis and experiments using multitasking and distributed operating systems show that shared register multistreaming can sustain near optimal processor utilization for a variety of workloads

Published in:

System Theory, 1994., Proceedings of the 26th Southeastern Symposium on

Date of Conference:

20-22 Mar 1994