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Hierarchical reachability graph of bounded Petri nets for concurrent-software analysis

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2 Author(s)
Notomi, M. ; Dept. of Electr. Eng. & Comput. Sci., Illinois Univ., Chicago, IL, USA ; Murata, T.

Petri nets have been proposed as a promising tool for modeling and analyzing concurrent-software systems such as Ada programs and communication protocol software. Among analysis techniques available for Petri nets, the most general approach is to generate all possible states (markings) of the system in a form of a so-called reachability graph. However, this conventional reachability graph approach is inefficient or intractable, even for a bounded Petri net, due to state explosion in many practical applications. To cope with this problem, this paper proposes a method for constructing a hierarchically organized state space called the hierarchical reachability graph (HRG). Using the HRG, we obtain necessary and sufficient conditions for reachability and deadlock, as well as algorithms to test whether a given state or marking is reachable from the initial state and whether there is a deadlock state (a state with no successor states)

Published in:

Software Engineering, IEEE Transactions on  (Volume:20 ,  Issue: 5 )

Date of Publication:

May 1994

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