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An automatic offset compensation scheme for CMOS operational amplifiers is presented. Offset is reduced by digitally adjusting the bias voltage of a programmable current mirror which is used as the load of the differential input stage. A 100% operating duty cycle is obtained by using a ping-pong structure. The offset compensation scheme is inherently time and temperature stable since the offset compensation is periodically performed with the ping-pong control. The proposed circuit has been fabricated using a 1.0 μm n-well CMOS process. The measured offset voltages of the test circuits are less than 400 μV in magnitude
Published in:
Solid-State Circuits, IEEE Journal of
(Volume:29
,
Issue:
5
)
Date of Publication: May 1994
- Page(s):
- 601 - 610
- ISSN :
- 0018-9200
- INSPEC Accession Number:
- 4702916
- Digital Object Identifier :
- 10.1109/4.284713
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 August 2002
- Issue Date :
- May 1994
- Sponsored by :
- IEEE Solid-State Circuits Society
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