By Topic

Design and simulations of a serial-link interconnection network for a massively parallel computer system

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Sharif, H. ; Dept. of Electr. Eng., Nebraska Univ., Lincoln, NE, USA ; Vakilzadian, H. ; Hong Jiang

This paper presents a study of an interconnecting architecture between an array of processing elements and shared memory modules in a massively parallel computer system. This architecture is called Serial Link Interconnection Network (SLIN). SLIN is based on ultrahigh-throughput (more than one gigabits per second) bi-directional serial links. These links connect serially ported processing elements and memory modules through a network of switches. The interconnection network places the outer columns of the switches in a tree topology while the innermost columns are linked point to point. The results of the SLIN computer models' simulations are analyzed. The findings show the advantages of SLIN architecture in terms of cost-effectiveness and link utilization

Published in:

Modeling, Analysis, and Simulation of Computer and Telecommunication Systems, 1994., MASCOTS '94., Proceedings of the Second International Workshop on

Date of Conference:

31 Jan-2 Feb 1994