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IDDQ measurement based diagnosis of bridging faults in full scan circuits

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2 Author(s)
S. Chakravarty ; Dept. of Comput. Sci., State Univ. of New York, Buffalo, NY, USA ; S. Suresh

An algorithm for diagnosing two node bridging faults in static CMOS combinational circuits (full scan circuits) is presented. This algorithm uses results from IDDQ testing. The bridging faults considered can be between nodes that are outputs of a gate or internal nodes of gates. Experiments on ISCAS89 circuits show that: IDDQ measurement based diagnosis, using a small number of random vectors, is very effective; and it is computationally feasible to diagnose, using IDDQ measurement, the large number of all bridging faults

Published in:

VLSI Design, 1994., Proceedings of the Seventh International Conference on

Date of Conference:

5-8 Jan 1994