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Analog modeling using event-driven HDL's

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2 Author(s)
Dumlugol, D. ; Cadence Design Syst. Inc., San Jose, CA ; Webber, D.

This paper describes how event-driven HDL's can be used for system level (transfer function, signal flow) modeling of analog mixed-signal systems. The modelling approach is illustrated with Verilog models for an ADC, DAC, and an Auto-Gain Control System (AGC). Simulation results for these models obtained with the mixed-signal simulator Spectre-Verilog running under the Cadence Analog Artist system are presented. System tasks and features in Verilog that support this kind of modeling and their advantages and limitations are discussed. We briefly describe the requirements for a full-fledged analog HDL as being developed by the VHDL 1076.1 effort

Published in:

VLSI Design, 1994., Proceedings of the Seventh International Conference on

Date of Conference:

5-8 Jan 1994