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Parallel implementation of the fast Fourier transform on two TMS320C25 digital signal processors

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1 Author(s)
Hen-Geul Yeh ; Dept. of Electr. Eng., California State Univ., Long Beach, CA

The author used two fixed-point TMS320C25 digital signal processors (DSPs) to implement in parallel the FFT. The significance of this multiprocessing system is: (1) the number of times block data transfer occurs between these two DSPs is minimum, (2) each DSP can independently perform the same FFT routine with different data set, and (3) the total computational load is nearly equally distributed to two DSPs. The speedup of this system over a single sequential processor is close to two

Published in:

Industrial Electronics, IEEE Transactions on  (Volume:41 ,  Issue: 1 )

Date of Publication:

Feb 1994

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