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Salphasic distribution of clock signals for synchronous systems

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1 Author(s)
Chi, V.L. ; Microelectron. Syst. Lab., North Carolina Univ., Chapel Hill, NC, USA

The design of a synchronous system having a global clock must account for propagation-delay-induced phase shifts experienced by the clock signal (clock skew) in its distribution network. As clock speeds and system diameters increase, this requirement becomes increasingly constraining on system designs. The paper describes a method that exploits properties of standing waves to reduce substantially clock skews due to unequal path lengths, for distribution network diameters up to several meters. The basic principles are developed for a loaded transmission line, and then applied to an arbitrary branching tree of such lines to implement a clock distribution network. The extension of this method to two- and three-dimensional distribution media is also presented, suggesting the feasibility of implementing printed circuit board clock planes exhibiting negligible phase shift over their extents

Published in:

Computers, IEEE Transactions on  (Volume:43 ,  Issue: 5 )