Referenced Items are not available for this document.
A superscalar RISC processor contains 2.8 million transistors in a die size of 16.2 mm×16.5 mm, and utilizes 3.3 V/0.5 μm BiCMOS technology. In order to take advantage of superscalar performance without incurring penalties from a slower clock or a longer pipeline, a tag bit is implemented in the instruction cache to indicate dependency between two instructions. A performance gain of up to 37% is obtained with only a 3.5% area overhead from our superscalar design
Published in:
Solid-State Circuits, IEEE Journal of
(Volume:29
,
Issue:
4
)
Date of Publication: Apr 1994
- Page(s):
- 389 - 396
- ISSN :
- 0018-9200
- INSPEC Accession Number:
- 4684172
- Digital Object Identifier :
- 10.1109/4.280686
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 August 2002
- Issue Date :
- Apr 1994
- Sponsored by :
- IEEE Solid-State Circuits Society
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