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PENTAG-a Petri net based automatic test pattern generator for sequential digital circuits

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2 Author(s)
Witts, G. ; Sch. of Eng., Oxford Brookes Univ., UK ; Alshahib, I.

Describes an automatic test pattern generation program for sequential digital circuits using a modified implementation of Petri nets. This is achieved by the insertion of a FAN transition to the Petri net model. The resultant system compares favourably (12% more coverage and 30% faster) with similar ATPG programs based on the established D-algorithm path sensitization technique

Published in:

Testing-the Gordian Knot of VLSI Design, IEE Colloquium on

Date of Conference:

28 May 1993