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A programmable VLSI architecture for computing multiplication and polynomial evaluation modulo a positive integer

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4 Author(s)
Erl-Huei Lu ; Dept. of Electr. Eng., Nat. Cheng King Univ., Tainan, Taiwan ; Harn, L. ; Lee, Jau-Yien ; Hwang, W.-Y.

A programmable VLSI architecture with regular, modular, expansible features is designed for computing AB mod N, AB+C mode N, and polynomial evaluation modulo N. The size of the resultant circuit can be easily expanded to improve the security of cryptosystems without making any change to its control circuit. The computing procedures for all N throughout the range of 0>

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:23 ,  Issue: 1 )