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A statistical method to integrate manufacturing tolerance in high-speed digital circuit design

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3 Author(s)
Goel, N. ; Northern Telecom Electron., Ottawa, Ont., Canada ; Kalaichelvan, K.S. ; Bleuer, B.

The authors outline a computationally efficient statistical method to design high-speed digital circuits, taking into account the manufacturing tolerance of interconnects. The proposed method can be used in the design of high-density printed circuit packs and multi-chip modules (MCMs). It can also be used to bring the aspects of manufacturability into the early stage of the design to minimize the cycle time between design and the final product. The design process presented here uses Monte Carlo analysis along with stochastic approximation to optimize the cost per satisfactory circuit. A relationship is established between the electrical requirements and the manufacturing tolerance of interconnects. Manufacturability signature profiles are presented for various interconnect configurations such as microstrip and buried microstrip. Finally, the simulation results are verified experimentally for the design of MCMs and are found to be in good agreement

Published in:

Electronics Manufacturing Technology Symposium, 1991., Eleventh IEEE/CHMT International

Date of Conference:

16-18 Sep 1991