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A 7 Mbyte/s (65 MHz), mixed-signal, magnetic recording channel DSP using partial response signaling with maximum likelihood detection

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5 Author(s)

A mixed-signal, 7.0 Mbyte/s PRML (partial-response maximum likelihood) read/write channel is discussed in this paper. PR-IV (minimum signal bandwidth) for signal encoding is used, along with ML (maximum likelihood) detection to achieve superior error rate performance. Signal equalization is provided using a programmable ten-tap FIR (finite impulse response) digital filter. This read/write channel is implemented on a single chip using analog circuits and 20 K CMOS logic gates. The 7.5 mm square chip uses a 5 V, 1 μm, BiCMOS process with a 6 GHz n-p-n and a 1 GHz p-n-p and is packaged in a 100-lead metal QFPK (quad flat pack)

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:29 ,  Issue: 3 )

Date of Publication:

Mar 1994

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