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Large-area shower implanter for thin-film transistors

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6 Author(s)
Wu, Y ; Dept. of Electr. & Electron. Eng., Queen''s Univ., Belfast, UK ; Montgomery, J.H. ; Refsum, A. ; Mitchell, S.J.N.
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Solid-state diffusion and conventional ion implantation are not suitable for source and drain regions formation of polysilicon thin-film transistors on glass substrates. A 30 cm diameter large-area low-energy ion shower implanter with RIPE ion source and double-grid extraction system was developed as a possible low-cost solution. The ion beam current density for hydrogen plasma was 100 μA/cm2 for 3 keV implant energy, 300 W RF power, 140 gauss magnetic field and 3×10-4 mbar pressure. The uniformity of beam current density over the central 20 cm diameter was ±3.5%. Phosphorus implantation has been performed using a 15% PH3 in H2 gas mixture. Implantation at 3 keV for 5 min. results in an integrated dose of 2.48×1016 cm-2 with the concentration peak at a depth of 8.3 nm. Planar and mesa diodes fabricated on p-type silicon substrates have yielded fine rectifier characteristics. The shower implanter is thus suitable for TFTs source and drain region formation

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Circuits, Devices and Systems, IEE Proceedings -  (Volume:141 ,  Issue: 1 )