By Topic

A circuit design for the improvement of radiation hardness in CMOS digital circuits

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
C. -C. Chen ; Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan ; S. -C. Liu ; C. -C. Hsiao ; J. -G. Hwu

A design consideration for digital CMOS circuits that are almost insensitive to radiation is proposed. By adding three n-MOSFETs to the conventional digital CMOS circuits, good radiation-hard behavior is observed in the inverter, NOR, and NAND gates under SPICE simulation. Detailed circuit design consideration and the simulation results are given

Published in:

IEEE Transactions on Nuclear Science  (Volume:39 ,  Issue: 2 )