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The T9000 transputer

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3 Author(s)
May, D. ; Inmos Ltd., Bristol, UK ; Shepherd, R. ; Thompson, P.

Some of the issues arising in the design of the T9000 transputer, which integrates a complete computer in a single VLSI chip of over two million transistors, are discussed. High performance has been achieved by extensive use of caching and a novel processor implementation. The processor uses a fat pipeline and dispatches several dependent instructions into the pipeline each cycle. The resulting processor is able to saturate a 25-MFLOP floating-point unit. The processor is supported by a communications system that supports communications at high speed and low latency

Published in:

Computer Design: VLSI in Computers and Processors, 1992. ICCD '92. Proceedings, IEEE 1992 International Conference on

Date of Conference:

11-14 Oct 1992