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Synthesis on multiplexer-based FPGA using binary decision diagrams

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5 Author(s)
T. Besson ; Inst. Nat. Polytech. de Grenoble, France ; H. Bouzouzou ; M. Crastes ; I. Floricica
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Synthesis methods are presented for multiplexer-based field-programmable gate arrays, (FPGAs) based on binary decision diagrams (BDDs) for speed optimization, and reduced ordered binary decision diagrams (ROBDDs) for area optimization. A direct mapping is performed on the two types of binary decision diagrams. Practical results are given for an exhaustive list of benchmarks. The results show a big improvement compared to library based approaches

Published in:

Computer Design: VLSI in Computers and Processors, 1992. ICCD '92. Proceedings, IEEE 1992 International Conference on

Date of Conference:

11-14 Oct 1992