Referenced Items are not available for this document.
This paper presents a CMOS buffer amplifier which operates on a single 5-V power supply. The uniquely symmetrical design adds the following advantages: rail-to-rail linear, symmetrical operation at both the input and output; the output stage allows the use of gate channel capacitors of standard MOSFET's as the compensation capacitor saving die area from 80%~93% in a standard single polysilicon digital process; large gain-bandwidth product; high power supply rejection ratio; good common-mode rejection ratio; and easy compact layout suitable for design automation (layout as a parametric cell, allows easy adaption to changing processes). The buffer is capable of driving 300 Ω||100 pF with a loaded gain-bandwidth product of more than 4 MHz and a fully loaded slew rate of greater than 4 V/μS
Published in:
Solid-State Circuits, IEEE Journal of
(Volume:29
,
Issue:
1
)
Date of Publication: Jan 1994
- Page(s):
- 63 - 66
- ISSN :
- 0018-9200
- INSPEC Accession Number:
- 4666813
- Digital Object Identifier :
- 10.1109/4.272096
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 August 2002
- Issue Date :
- Jan 1994
- Sponsored by :
- IEEE Solid-State Circuits Society
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