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A general architecture of ATM switching networks which are non-blocking at call level

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2 Author(s)
Sezaki, K. ; Inst. of Ind. Sci., Tokyo Univ., Japan ; Yasuda, Y.

The simplest approach to compose a very large scale asynchronous transfer mode switching network is to compose it with only buffered unit switches. A practical architecture of such a switching network is studied and a generalized parallel delta network is proposed. It is composed by only one kind of n×n unit switch. The number of stages does not necessarily depend on the scale of the entire switching network. It is nonblocking at call level, and good cell-level traffic performance is expected. It is also very fault tolerant

Published in:

TENCON '92. ''Technology Enabling Tomorrow : Computers, Communications and Automation towards the 21st Century.' 1992 IEEE Region 10 International Conference.

Date of Conference:

11-13 Nov 1992