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Design of analog CMOS integrated circuits input stage for the operation at zero temperature coefficient using PSPICE

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2 Author(s)
M. E. Rizkalla ; Dept. of Electr. Eng., Purdue Univ., Indianapolis, IN, USA ; H. C. Gundrum

A PSPICE program is utilized to design an analog CMOS integrated circuit amplifier for operation at zero temperature coefficient, which solves the problem of drift in DC amplifiers under the effect of temperature variations. The model used includes the linear and nonlinear parameters of the devices. The device channel parameters length l, and width w, are evaluated to give the proper bias to reduce the drift characteristics. The constraints of the device parameters in improving the AC characteristics are discussed, and the useful range of temperature for optimum design performance is determined. In the authors' model, a drift of 4 μv/c over the range of 30°C to 90°C is observed. The overall gain of the two stages is estimated to be ⩾50 dBs with the gain-bandwidth product of 5.9 MHz at 500-μA biasing. The noise figure for the given bias is 0.5 μv/√Hz

Published in:

Circuits and Systems, 1992., Proceedings of the 35th Midwest Symposium on

Date of Conference:

9-12 Aug 1992