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Use of VHDL synthesis in an advanced digital design course

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1 Author(s)
Reese, B. ; Dept. of Electr. Eng., Mississippi State Univ., MS, USA

A VHSIC hardware description language (VHDL) synthesis tool is used for an advanced digital design course. The tool has the capability of synthesizing sequential elements (flip-flops) as well as combinational logic. The tool gives students the capability of practising a true top-down design methodology. Synthesis implementation targets include the ITD standard cell library (Octtools), Xilinx field programmable gate array (FPGA), Actel FPGA, and Altera FPGA

Published in:

ASIC Conference and Exhibit, 1992., Proceedings of Fifth Annual IEEE International

Date of Conference:

21-25 Sep 1992