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A power MOSFET design methodology considering epi parameter variations

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5 Author(s)
Seong-Kyu Hwang ; Korea Electron. Technol. Inst., Seoul, South Korea ; Yearn-Ik Choi ; Sang-Koo Chung ; Kwyro Lee
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An optimum design method for power MOSFETs that maximizes the number of good dies is presented. From the device specification of the maximum voltage and current given, the target design value of the breakdown voltage required for the maximum number of good dies it determined by considering the variations of parameters such as thickness and resistivity of the epitaxial layer, chip area, and defect density during the manufacturing process. In the case of a 650-V/5-A power MOSFET, the optimum design target of the breakdown voltage is found to be 710 V, which gives 1213 good dies from a 5-in wafer with the defect density of 5/cm2 when ideal junction termination is assumed. This maximum number of good dies is reduced to 855 in practice due to the nonideal junction termination with 80% of the ideal breakdown voltage, resulting in the target design voltage of 890 V

Published in:

Semiconductor Manufacturing, IEEE Transactions on  (Volume:6 ,  Issue: 4 )

Date of Publication:

Nov 1993

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