By Topic

1196-1987  -  IEEE Standard for a Simple 32-Bit Backplane Bus: NuBus

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$177.0 $142.0
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

The standard describes a computer backplane bus optimized for 32-bit transfers, multiprocessor operations, and simplicity. In brief, this is a synchronous (10 MHz). multiplexed, multimaster bus that provides a strictly fair arbitration mechanism. The only bus transfers are read and write (and block transfer versions of each of these) to a single 32-bit address space. Geographic slot addressing and nondaisy-chain arbitration scheme make system configuration simpler by eliminating switches and jumpers. This minimalist approach results in a conceptually straightforward bus with a small pin count (51 active signal lines).<>