Performance analysis of the ATM Shuffleout switching architecture under non-uniform traffic patterns

The authors describe a model for the performance evaluation of the Shuffleout asynchronous transfer mode (ATM) switch under arbitrary nonuniform traffic patterns. Shuffleout is a blocking multistage structure using shortest path routing with deflection, in which output queues are connected to all the stages. The analytical model developed computes the load on each interstage link by tracing all the paths that a packet can follow to reach the addressed switch outlet, that is, by taking into account all the deflections from its shortest path it can receive. Such a model allows the computation not only of the average load per stage but also its distribution over the different links belonging to the interstage pattern. Thus fairness in packet switching by Shuffleout is provided by the model.<
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