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A systolic power-sum circuit for GF(2m)

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1 Author(s)
Shyue-Win Wei ; China Coll. of Eng., Hsin-Chu, Taiwan

A systolic power-sum circuit designed to perform AB2+C computations in the finite field GF(2m) is presented, where A, B, and C are arbitrary elements of GF(2m). This new circuit is constructed by m2 identical cells, each of which consists of three 2-input AND logical gates, one 2-input XOR gate, one 3-input XOR gate, and ten latches. The AB2+C computation is required in decoding many error-correcting codes. The paper shows that a decoder implemented using the new power-sum circuit will have less complex circuitry and shorter decoding delay than one implemented using conventional product-sum multipliers

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Computers, IEEE Transactions on  (Volume:43 ,  Issue: 2 )