By Topic

Evaluation of lateral diffusion factor in silicon from subthreshold current in short-channel vertical SIT test structure

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Spirito, P. ; Dept. of Electron. Eng., Naples Univ., Italy ; Persiano, G.V. ; Strollo, A.G.M. ; Fallica, G.

A measurement method for the evaluation of the lateral diffusion factor of deep implanted regions in lightly doped material is proposed. The method is based on measurements of the subthreshold current versus drain voltage in vertical static induction transistor (SIT) devices. The subthreshold current is very sensitive to SIT channel width and hence to lateral diffusion of the gate regions, as shown by two-dimensional numerical analysis. Experimental results obtained for test structures fabricated with different boron doses and the same drive-in treatment indicate a lateral diffusion factor of 64% for a typical drive-in process.<>

Published in:

Electron Device Letters, IEEE  (Volume:14 ,  Issue: 12 )