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A new technique for forming a shallow link base in a double polysilicon bipolar transistor

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4 Author(s)
J. D. Hayden ; Adv. Products Res. & Dev. Lab., Motorola Inc., Austin, TX, USA ; J. D. Burnett ; J. R. Pfiester ; M. P. Woo

A new technique is presented for forming a shallow link base in a double polysilicon bipolar transistor. This method is easily integrated into an advanced BiCMOS process, making use of a disposable polysilicon spacer technology for MOSFET LDD formation. This new scheme allows independent optimization of active and link base regions while providing improvements in base-emitter breakdown and resistance to bipolar hot carrier degradation

Published in:

IEEE Transactions on Electron Devices  (Volume:41 ,  Issue: 1 )