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The ELSA wafer scale integration project

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1 Author(s)
Ivey, P. ; Dept. of Electron. & Electr. Eng., Sheffield Univ., UK

Outlines some of the technology, successful and unsuccessful, of part of a large European project in wafer scale integration (WSI). The work described is an attempt to build a 64 by 64 array processor on a 4-in wafer. Such a processor would have a computing power in excess of 10 billion operations per second. A test chip and a demonstration system, which achieves such a processing power, is also described

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Components, Hybrids, and Manufacturing Technology, IEEE Transactions on  (Volume:16 ,  Issue: 7 )