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A universal nonlinear component and its application to WSI

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3 Author(s)
Jain, V.K. ; Dept. of Electr. Eng., Univ. of South Florida, Tampa, FL, USA ; Wadekar, S.A. ; Lei Lin

Presents a high-speed multifunction chip for performing one of four nonlinear operations: 1) square root, 2) reciprocal, 3) sine/cosine, and 4) arctangent. Each of these functions is evaluated with one ROM access, two additions, and one major and one minor multiplication, yielding a new result every two clock cycles. Its performance signifies an estimated three-to-four-fold increase in speed (for comparable technologies and minimum feature size) over existing approaches. Furthermore, since all four functions are performed on the same cell, a silicon-area advantage of approximately three is realized when the application demands multiple functions. In wafer scale integration (WSI) of signal and image processing algorithms, several such functions are usually needed, while defect tolerance dictates the use of just one or two types of cells. Thus the new component is ideally suited for monolithic WSI. However, it can also be used as a co-processor/accelerator for commercial DSP chips in hybrid WSI implementation of signal processing algorithms. The underlying principle, which has made the combined goals of high-speed and multifunctionality possible, is second-order interpolation of very small ROM tables. Two versions are presented: a 24-b chip, and a 16-b chip, both fabricated in 2.0-μm CMOS technology

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Components, Hybrids, and Manufacturing Technology, IEEE Transactions on  (Volume:16 ,  Issue: 7 )