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IEEE P1149 Proposed Standard Testability Bus-An update with case histories

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1 Author(s)
Turino, J. ; Logical Solutions Technol. Inc., Campbell, CA, USA

The author outlines the history of the IEEE P1149 proposed standard testability bus and describes the latest version of the bus, which is now structured to include four distinct subsets (any or all of which may be used in any combination). Included are illustrations of implementations of the proposed bus using circuitry dedicated to the testability bus and also using circuitry that performs both needed circuit functions and the testability interface functions. Built-in test examples are also included. The author concludes with a summary of the time-to-market and economic advantages of using the testability bus and a description of the current status of the P1149 effort plus plans and the timetable for the future

Published in:

Computer Design: VLSI in Computers and Processors, 1988. ICCD '88., Proceedings of the 1988 IEEE International Conference on

Date of Conference:

3-5 Oct 1988